ISIS SCHEMATIC FILEy DesignplateDS kjh\ kjdg\bJS23/12/1223/12/12PDP * DESIGN CONFIGURATION DATAArialDefault Font  p M M ``@@@@ COMPONENTȪȪPINPORT@MARKER`O@ACTUATOR`O@@ INDICATOR`O@@VPROBE`OIPROBE`OTAPE`O GENERATOR`OTERMINAL@ SUBCIRCUIT=ȪȪ 2D GRAPHICWIRE DOT@@@WIRE@BUS WIREPSBORDERȪȪTEMPLATE COMPONENT ID&H Default FontCOMPONENT VALUE&0 Default Font PROPERTIES&0 Default FontTERMINAL LABEL&0 Default Font WIRE LABEL&0 Default Font SUBCKT ID&H Default Font SUBCKT NAME&0 Default FontSCRIPT&0 Default FontPIN NAME&0 Default Font PIN NUMBER&0 Default Font VPROBE LABEL&0 Default Font IPROBE LABEL&0 Default FontGENERATOR LABEL&0 Default Font TAPE LABEL&0 Default FontACTIVE READOUT0ArialPWRRAILS*RAILS *BINDINGS $DCGEN޳3z j`"`OGENERATOR/H/0H<4"`OGENERATOR04$MKRORIGIN04H$MKRLABEL<4"`OGENERATOR|p|<4"`OGENERATOR|PS|<4"`OGENERATOR|0|<4"`OGENERATOR|m|<4"`OGENERATORPSPS<4"`OGENERATOR3|| $MKRBUSNODE޳3I=8`O@MARKER9p s $MKRLABEL޳304$MKRORIGINkf`O@MARKER0Default FontLABEL$MKRNODE޳3~94`O@MARKER9pp994`O@MARKER99pp $MKRORIGIN{3=8`O@MARKER9p s94`O@MARKER s94`O@MARKER s $MKRPINNUM޳304$MKRORIGINhc`O@MARKER/0Default Font99 $PINSHORT޳364PIN04$MKRPINNUM04$MKRNODE04$MKRORIGIN04$MKRORIGIN$SINEGEN߳3Bj`"`OGENERATOR/H/0HLD"`OGENERATOR|hCpmmLD"`OGENERATOR0|0hCmmLD"`OGENERATOR0|0PSHLD"`OGENERATOR`|`PSH<4"`OGENERATOR04$MKRORIGIN04H$MKRLABEL $TERBIDIR߳3{i`!@TERMINAL s0 s0;4!@TERMINAL;4!@TERMINAL s04$MKRORIGIN04$MKRNODE04H$MKRLABEL$TERBUS߳3i`!@TERMINAL040$MKRBUSNODE04$MKRORIGIN04$MKRLABEL $TERDEFAULT߳370!@TERMINAL;4!@TERMINAL90040$MKRNODE04$MKRORIGIN04/$MKRLABEL $TERGROUND߳3;4!@TERMINAL0;4!@TERMINAL0;4!@TERMINAL;4!@TERMINALȜ8c04$MKRORIGIN040$MKRNODE04?$MKRLABEL $TERINPUT߳3@i`!@TERMINAL s s;4!@TERMINAL004t$MKRORIGIN040t$MKRNODE04/$MKRLABEL $TEROUTPUT߳3@i`!@TERMINAL s0 s0;4!@TERMINAL04H$MKRLABEL04$MKRNODE04$MKRORIGIN $TERPOWER߳3@i`!@TERMINAL00;4!@TERMINAL004$MKRNODE04$MKRORIGIN04`$MKRLABEL$VPROBE߳3 g``OVPROBEHHHH00HH94`OVPROBE04`H$MKRLABEL04$MKRORIGINCAP]Iv,<4"ȪȪCOMPONENT)0)<4"ȪȪCOMPONENTX0X<4"ȪȪCOMPONENTX<4"ȪȪCOMPONENT)004$MKRORIGIN0$PINSHORT2$PINSHORT1{*DEVICE} {PREFIX=C} {HELP=MODELS>POPUP,122} {*PROPDEFS} {PINSWAP="Pin Swap List",HIDDEN STRING} {PRIMITIVE="Simulator Primitive Type",HIDDEN STRING} {VALUE="Capacitance",FLOAT,PNZ} {PACKAGE="PCB Package",PACKAGE,2,CAP10,CAP20} {*INDEX} {CAT=Capacitors} {SUBCAT=Generic} {DESC=Generic non-electrolytic capacitor} {*COMPONENT} {VALUE=1nF} {PRIMITIVE=ANALOGUE,CAPACITOR} {PACKAGE=CAP10} *PINOUT CAP10 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} *PINOUT CAP20 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} RES]I|@8"ȪȪCOMPONENT @04$MKRORIGIN$PINSHORT1`$PINSHORT2{*DEVICE} {PREFIX=R} {HELP=MODELS>POPUP,100} {*PROPDEFS} {VALUE="Resistance",FLOAT,PNZ} {PRIMITIVE="Model Type",KWDLIST,2,ANALOG,DIGITAL} {PRIMTYPE="Primitive Type",HIDDEN STRING} {PINSWAP="Pin Swap List",HIDDEN STRING} {PACKAGE="PCB Package",PACKAGE,8,0402,0603,0805,1206,RES40,RES50,RES60,RES90} {*INDEX} {CAT=Resistors} {SUBCAT=Generic} {DESC=Generic resistor symbol} {*COMPONENT} {VALUE=10k} {PRIMITIVE=ANALOG} {PRIMTYPE=RESISTOR} {PACKAGE=RES40} *PINOUT 0402 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} *PINOUT 0603 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} *PINOUT 0805 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} *PINOUT 1206 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} *PINOUT RES40 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} *PINOUT RES50 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} *PINOUT RES60 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} *PINOUT RES90 {ELEMENTS=1} {PIN "1" = 1} {PIN "2" = 2} {PINSWAP=1,2} @ISIS CIRCUIT FILE  MOBJECT DATA)FREQUENCY RESPONSE{*OPTIONS} {ABSTOL=1e-12} {BADMOS3=No} {BYPASS=Yes} {CHGTOL=1e-14} {DEFAD=0} {DEFAS=0} {DEFAULTS=0} {DEFL=0.0001} {DEFW=0.0001} {GMIN=1e-18} {GMINSTEPS=120} {ITL1=100} {ITL2=50} {ITL4=50} {MAXORD=2} {METHOD=TRAPEZOIDAL} {NOOPITER=No} {NUMSTEPS=50} {OLDLIMIT=No} {PIVREL=0.001} {PIVTOL=1e-13} {RELTOL=0.01} {RSHUNT=1e+12} {SRCSTEPS=120} {TDLOWER=0.9} {TDSCALE=1} {TDUPPER=1.1} {TEMP=27} {TMIN=1e-12} {TNOM=27} {TRANGMIN=1e-18} {TRTOL=7} {TRYTOCOMPACT=No} {TTOL=1e-09} {VNTOL=1e-06} {*USER} FREQ ;h$@cA$@cAqƞTPO}nVv2#yV@ GAIN (dB)%2Vector FontPHASEjd%2Vector Fontso%2Vector FontP1 P50D6DB81s>$@qƞTP/;-)@coxOhx4/@}թNnSY3@iMxIm9@TL)In?@[ǬKC@QxJS2I@7&IAO@ijHK8aS@5PGY@G+Fj ey_@4)ECՀc@Wz DMoh@m"TECZ\] fo@ƠB\s@UG1Aexx@f[@R@*> 9@7|<9҈@d#g:@@=ն'8$=&@_96f Ø@Z T4dK -@yJ}2Yş@CG 07=y)@kJ3.W$@:b@+}nQߓ@V'(fNG͒@ bn&GH@%@Ά2#r@\^L#?NIw@v2#;'|@H#CP@::#׳@F;9$Vp@'& %x@z?h+("@M0˂&+l,d@X Z.j@ OĬ0H@yGl2ЍXA<*B4f 1[A+'6kT,%AG؂8طfMAYӈ: :lLAvt <; A=E_ZA#AMF?-x=(Axu=@.AԠFSAWki53A"HB!E1.8AkC͡Pq>AE(Dƴ;7*CA]$%EeR HA~cpFjNڇ_NA<)gG~hSAZ&4aHw\XAq&]I:9M^AB\([JcA7YKcA7YKsj%2Vector FontP1 P50D6DB81s>$@yV@/;-)@Mi^LwV@hx4/@bڔ uV@nSY3@Is5rV@xIm9@ :OnV@)In?@Ӂ{$jV@C@|{dV@S2I@P[]V@AO@˼cTV@K8aS@vHIV@Y@sT:V@j ey_@>Wt(V@CՀc@QyV@Moh@l4{!U@Z\] fo@x;^vU@\s@ƀ~U@exx@v+mU@R@ØC&U@ 9@(Vޏ>T@9҈@]]T@@@!+S@$=&@Qr$S@f Ø@hgMR@dK -@DAQC(Vƴ;7*CAZ M:VeR HAg߈HVjNڇ_NA[TV~hSAjP*]Vw\XAwf@dV:9M^A V_biVcAO}nVcAO}nV G50D706B3e 9)~B6 M50D706B3$SINEGENe/w<50 Default FontGENERATOR LABEL0{AMP=1} {OFFSET=0} {FREQ=1} {PHASE=0} {THETA=0} /w":00 Default FontPROPERTIES0%6 =0B6 P50D6DB81$VPROBEs0<20 Default FontVPROBE LABEL0":00 Default FontPROPERTIESR;; ?Xun"ȪȪCOMPONENT Default FontDiagramme de Bode du filtre passe bande du second ordre : le pont de Wien K"ȪȪCOMPONENT 0Default FontRalis par Jean-Christophe MICHEL Hʉvn"ȪȪCOMPONENT 0Default FontDcembre 2012 Hʉ8.vn"ȪȪCOMPONENT 0Default Fontwww.gecif.netR1[82H Default FontCOMPONENT ID10k[`f450 Default FontCOMPONENT VALUERES[0010 Default FontSUBCKT NAME({PRIMITIVE=ANALOG} {PRIMTYPE=RESISTOR} [0000 Default FontPROPERTIES9{PRIMITIVE=ANALOG} {PRIMTYPE=RESISTOR} {PACKAGE=RES40} RESB6 %68@WIREe600 Default FontWIRE LABEL)~B6HʉB6C1h|0r:2H Default FontCOMPONENT ID1nFh|250 Default FontCOMPONENT VALUECAPh|2.10 Default FontSUBCKT NAME0{PRIMITIVE=ANALOGUE,CAPACITOR} {PACKAGE=CAP10} h|2.00 Default FontPROPERTIES0CAPB6 [<8@WIRE8+B6B6R2y1#2H Default FontCOMPONENT ID10ky`50 Default FontCOMPONENT VALUERESy10 Default FontSUBCKT NAME({PRIMITIVE=ANALOG} {PRIMTYPE=RESISTOR} y00 Default FontPROPERTIES9{PRIMITIVE=ANALOG} {PRIMTYPE=RESISTOR} {PACKAGE=RES40} RESxP! 6><C2@1#2H Default FontCOMPONENT ID1nF@`50 Default FontCOMPONENT VALUECAP@10 Default FontSUBCKT NAME0{PRIMITIVE=ANALOGUE,CAPACITOR} {PACKAGE=CAP10} @00 Default FontPROPERTIES0CAP <= B6R;@WIREB6 B6B6;<<@WIREs600 Default FontWIRE LABELB6B6@WIRE&B6xB6[<<<@WIREXlB6xB6@WIREB6xB6@WIREx&xB6(rB6 =@WIRE)~B6(rB6(r >p = ==>@WIREp @WIRE A x >6>?@WIRE x @WIREx`x Xl0 $TERGROUND (40 Default FontTERMINAL LABELG?Xl >?G?@WIRE(r Xl @WIREx Xl @WIREXl`Xl jB6ib!`O@@ACTUATOR Default FontE QB6ib!`O@@ACTUATOR Default FontSISIS CIRCUIT FILE MOBJECT DATACCT000 % __DEFAULT__f@ROOT10 M50D706B3 P50D6DB81 R11122 C12211 R21122 C22211CCT000 __DEFAULT__ __DEFAULT__???@ư>1- ABSTOL1e-12 BADMOS3No BYPASSYes CHGTOL1e-14DEFAD0DEFAS0 DEFAULTS0 DEFL0.0001 DEFW0.0001 GMIN1e-18GMINSTEPS120 ITL1100ITL250ITL450 LOGSTART0 LOGTIME60 MAXORD2METHODTRAPEZOIDAL NOOPITERNo NUMSTEPS50 OLDLIMITNo PIVREL0.001 PIVTOL1e-13 RELTOL0.01 RSHUNT1e+12 SRCSTEPS120 TDLOWER0.9 TDSCALE1 TDUPPER1.1TEMP27 TMIN1e-12TNOM27TRACE_CONTENTIONS1TRACE_CONVERGENCE1TRACE_DCPATHS1TRACE_ITFMODS1TRACE_NETTYPES1TRACE_OPTIONS1TRACE_PERFORMANCE1TRACE_SPICELINK1TRANGMIN1e-18TRTOL7TRYTOCOMPACTNo TTOL1e-09 VNTOL1e-06@v6>pYx`k&0